Senior ASIC Design Engineer
Actively Reviewing the ApplicationsNXP Semiconductors
Gurugram
Full-Time
4–8 years
Posted 2 days ago
•
Apply by June 11, 2026
Job Description
We are part of a great team within NXP that delivers the industry’s first tri-radio chip. Please visit our recent announcement: NXP Advances IoT Connectivity with Industry’s First Secure Tri-Radio Device | NXP Semiconductors
We have a senior level ASIC design engineer opening. Will you be interested in working on cutting-edge wireless technology that will be the backbone of future connected lifestyle? Do you like to work with a group of passionate and talented engineers to tackle the most crucial tasks leading to the next-generation of innovations? Are you ready for a career move that could make a bigger impact to the team’s success?
Our team focuses on wireless MAC controllers and system level development for wireless products, with a heavy focus on design and verification to accommodate new customer requested features and new standard specification feature developments. This is a great opportunity to work on wireless related product development with the best-in-class performance, area and lower power.
Your Responsibilities
More information about NXP in India...
We have a senior level ASIC design engineer opening. Will you be interested in working on cutting-edge wireless technology that will be the backbone of future connected lifestyle? Do you like to work with a group of passionate and talented engineers to tackle the most crucial tasks leading to the next-generation of innovations? Are you ready for a career move that could make a bigger impact to the team’s success?
Our team focuses on wireless MAC controllers and system level development for wireless products, with a heavy focus on design and verification to accommodate new customer requested features and new standard specification feature developments. This is a great opportunity to work on wireless related product development with the best-in-class performance, area and lower power.
Your Responsibilities
- Working in full ASIC design cycle ranging from micro architecture design, RTL coding, verification, synthesis, FPGA prototyping, and silicon bring-up.
- IP/SoC verification in C/C++, System Verilog, and UVM environment.
- Support of IP delivery, FPGA prototyping and silicon validation.
- Solving complex design and verification problems with your innovative ideas.
- MSEE with 3+ years of experience with working knowledge in Bluetooth, IEEE 802.15.4, wireless or other networking controller design and implementation.
- Micro-architecture, Verilog RTL coding, and IP/SoC verification.
- Familiar with ASIC design concept and design flow: HW/SW co-simulation, synthesis, Lint/CDC, and formal verification.
- Fluent in C/C++, System Verilog, and UVM.
- Familiar with SVA assertion and coverage driven verification.
- Familiar with Perl, Python, shell script, and Tcl.
- Small area and low power design experience.
- SOC integration experience.
- Complete product cycle experience from specification to production.
- Hands-on lab experience on FPGA validation and post-silicon bring-up.
- Excellent communication and report documentation skills.
More information about NXP in India...
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