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Senior Lead Engineer
Actively Reviewing
NXP Semiconductors
Job Description
- Master/Bachelor's Degree in Electrical/Electronic Engineering
- Experience 6-10 Years in high performance digital logic designs and SoC Integration using ARM Cores, Bus Protocols and Interconnects
- Building Subsystems and/or SoC RTL integration
- LINT/CDC/RDC signoffs for the highest design quality
- Perform all aspects of the SoC design flow from high level design to Synthesis
- Experience with Synopsys VCS or Cadence RTL simulator, Design Complier (DC) or RTL Compiler (RC or Genus), Verdi Debugging tool
- ISO26262 based functional safety relevant microcontroller architectures is preferred
- Experience with low-power design techniques is desirable.
- Conducting IP Integration reviews, BE reports reviews for concurrent engineering.
- Self-motivated to drive issues to closure.
- Excellent written and verbal communication skill.
- Creative problem-solving skills, logic analysis skills, ability to logically break complex problems down to manageable components.
Required Skills
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