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Design Verification Engineer

Surat, Gujarat, India

6 hours ago

Applicants: 0

Salary Not Disclosed

4 weeks left to apply

Job Description

Experience : 3.00 + years Salary : INR 2680000-3750000 / year (based on experience) Expected Notice Period : 30 Days Shift : (GMT+05:30) Asia/Kolkata (IST) Opportunity Type : Remote Placement Type : Full Time Permanent position(Payroll and Compliance to be managed by: Architect Labs) (*Note: This is a requirement for one of Uplers' client - Architect Labs) What do you need for this opportunity? Must have skills required: Data Analytics, emulation, Tape-out, SystemVerilog, testbench, UVM/OVM, VCS, Python, design verification, SoC Design Architect Labs is Looking for: As a Design Verification Engineer at Architect Labs , you?ll redefine the hardware design and verification process, methodology, and tools using our proprietary AI models and systems. In that context, we are seeking mid-level front-end hardware engineers to help build and curate high-quality RTL and verification datasets for AI training and evaluation. You?ll work on test-benches, coverage analysis, assertion coding, debug- friendly measurements, curation, and labeling of AI-generated collateral. Responsibilities What We?d Like to See Create detailed test plans based on design specifications Specify and build a UVM-based validation infrastructure for POC designs. Develop directed and random test cases to thoroughly test the design. Execute simulations and analyze results to identify and debug RTL/Verif bugs. Analyze simulation logs, coverage reports, waveform traces, and generate convergence data for AI models. Label, categorize verification outcomes (pass/fail, assertion hits, coverage, etc.) Identify, classify, tabulate, and generate analytics for DV bug/fix patterns. Help in prompt-tuning, generating rules, and guardrails for our RTl coding agents and models. Collaborate with ML engineers to build evaluation datasets, internal benchmarks, and evaluate model behavior and performance on verification tasks. Requirements Bachelor''s (or more) degree; 3+ years of experience in design/IP verification flows. Proficiency in System Verilog & standard verification methodologies (UVM, OVM) Experience with simulation and debugging tools like VCS, Xcelium, Verdi, etc.. Experienced in test-bench, stimuli, checkers, score-boards, and monitors development Familiarity with coverage methodology, signature, and bug analysis Scripting skills in Python/Perl for test automation Familiarity with SoC integration and design principles. Education Bachelor?s or Master?s degree in Computer Science, Electrical Engineering, or a related field from a Tier-1 institution (IITs, IIITs, BITS Pilani, NIT Trichy/Surathkal/ Warangal, etc.). Strong academic and research orientation is a plus. Preferred: Experienced in at least one product-level tape-out. Data analytics skills, data annotation experience. Flexibility in work hours, sync with PST timeline when needed. Experience in Emulation methodology and tool flow. Collaboration & Time Zone You?ll work remotely from India but collaborate daily with the Palo Alto team. Must have excellent written and spoken English communication, clear, concise, and proactive. Expect regular standups and sprint syncs with California (typically between 8?11 PM IST/ 7?10 AM PST). We value responsiveness, initiative, and a sense of ownership that transcends time zones. Interview Process Technical R1 (Code writing) Technical R2 (Technical discussions + Live Coding + Behavioural) How to apply for this opportunity? Step 1: Click On Apply! And Register or Login on our portal. Step 2: Complete the Screening Form & Upload updated Resume Step 3: Increase your chances to get shortlisted & meet the client for the Interview! About Uplers: Our goal is to make hiring reliable, simple, and fast. Our role will be to help all our talents find and apply for relevant contractual onsite opportunities and progress in their career. We will support any grievances or challenges you may face during the engagement. (Note: There are many more opportunities apart from this on the portal. Depending on the assessments you clear, you can apply for them as well). So, if you are ready for a new challenge, a great work environment, and an opportunity to take your career to the next level, don't hesitate to apply today. We are waiting for you!

Additional Information

Company Name
Uplers
Industry
N/A
Department
N/A
Role Category
Data Engineer
Job Role
Mid-Senior level
Education
No Restriction
Job Types
Remote
Gender
No Restriction
Notice Period
Less Than 30 Days
Year of Experience
1 - Any Yrs
Job Posted On
6 hours ago
Application Ends
4 weeks left to apply

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